Small electronic devices are today used in a wide variety of applications and have become a ubiquitous part of modern society. These applications include computers, telephony, and home entertainment, among many others. One reason for the widespread use of these devices is that recent advances in technology have expanded their capabilities while at the same time lowering their cost. A key part of this advancing technology has been the development of semiconductor devices.
Semiconductors are materials that conduct electricity only under certain conditions, which often include the presence of a small electrical charge. This enables the manufacture of solid-state switches—those that have no moving parts. Other standard (and new) electrical devices can be created out of semiconductors as well. In addition to having no moving components parts that are subject to fatigue or other mechanical failure, solid-state devices can be fabricated in extremely small sizes. Very small, even microscopic electrical components are now used to provide the multitude of switches and capacitors necessary for today's electronics applications.
The processes used to fabricate these tiny semiconductor devices are numerous, but the basic process may be described generally. A material, such as silicon, is produced for use as a base, or substrate, upon which various electrical components will be built. This material is then formed into an appropriate shape, usually a thin slice called a wafer. The pure silicon is then selectively treated with one or more materials called dopants, such as ionized boron or phosphorus. The introduction of these impurities begins the process of creating the desired semiconductive properties. Various structures may then be formed at or near one surface of the wafer to construct the desired components.
These surface structures may be formed by etching, whereby the surface is exposed to an etching agent. Or, more typically, the surface is selectively etched using a process known as photolithography. In photolithography, a material called photoresist, or simply resist, is deposited evenly over the wafer surface. The resist is then selectively treated with a light source directed though a patterned mask so that some portions of the resist are exposed to the light energy while others are not. The exposed portions are developed to be either strengthened or weakened, depending on the type of resist material used, so that the weaker portions can be washed away using a solvent that will not otherwise affect the wafer or any structures already formed on it. The resist that remains however, will prevent the etching of the wafer surface in the areas it covers when a stronger etching agent is used in subsequent etching steps. When the desired wafer etching has been accomplished, the remaining photoresist is removed using an appropriate solvent. Note that the photolithography process may also be used to create a photoresist pattern for selective epitaxy, deposition, or doping as well.
An exemplary transistor is shown in FIG. 1. FIG. 1 is an illustration showing in cross-section the basic components of a MOSFET (metal-oxide semiconductor field effect transistor) 10. Silicon forms the substrate 15 upon which various devices may be fabricated. The transistor includes a gate 20 having a gate electrode 25 the gate electrode made of a conductive material such as a metal. Separating the gate electrode from the substrate 15 is a thin gate oxide layer 30. In the transistor 10 of FIG. 1, spacers 35 are positioned on either side of the gate electrode 25. Conductive regions called a source 40 and a drain 45 are formed in the substrate 15 on either side of the spacers 35. Source 40, drain 45, and gate electrode 25 are each coupled, respectively, to electrical contacts 50, 51, 52, each of which may in turn be connected to external components (not shown) so that electrical current may flow to and from these transistor components when appropriate. When a small electrical charge is applied to gate electrode 25 via contact 52, then current will flow between drain 45 and source 40 via channel region 5. These MOSFET transistors are very small, for example, the gate electrode 25 of MOSFET 10 may be no more than 100 nm in width.
Different types of transistors may be formed by selecting the types of materials used to make them. For example, if source region 40 and drain region 45 are formed by doping the substrate 15 with boron ions, p-wells are created. In a PMOS transistor, positive charge carriers (holes) move between the source and drain when the transistor is activated by an applied voltage at gate electrode 25. In another example, doping selectively substrate 15 with phosphorous ions creates n-type source and drain regions between which negative charge carriers (electrons) may flow. This type of transistor may be called an NMOS transistor. An NMOS transistor and a PMOS transistor may be used together to advantage in what may be referred to as a complimentary metal oxide semiconductor (CMOS) device. In a CMOS device an NMOS transistor and a PMOS transistor or similar devices are formed adjacent to each other. “Adjacent” here means in close proximity, even though the two devices are electrically isolated.
As semiconductor devices become ever smaller, optimizing current flow becomes a high priority. A number of enhancements have been developed. For example, selective stress forces acting as semiconductor devices such as transistors improve current flow and other electrical properties in such components, resulting in an increase in overall system performance and reliability. The drive currents in MOSFETs may be enhanced by the addition of a pre-stressed layer, such as an etch stop layer, over the transistor. This enhancement is especially noticeable in the relatively-smaller devices now being fabricated. Both p-channel and n-channel drive currents may be improved in this way, although different stresses are required for each type. Tensile stress increases n-drive current, while compressive stress improves p-drive current. Unfortunately, in a CMOS device, both are present in close proximity to each other. The stress characteristics benefiting one of the CMOS devices may degrade the performance of an adjacent device. Needed, then is a structure formed to exploit the positive effects of stress engineering a CMOS device, while minimizing the negative effects. The present invention provides a novel way of applying stress forces that is especially of advantage when used in a CMOS device.